FPGA Realization of High-Efficient Address Generator Algorithm for WiMAX Deinterleaver

التفاصيل البيبلوغرافية
العنوان: FPGA Realization of High-Efficient Address Generator Algorithm for WiMAX Deinterleaver
المؤلفون: E, Veera Boopathy, K, Kalirajan, S, Mohamed Kasim, A, Mugesh, G, Rathish S, S, Nithyaganesh, P, Vimalraj
المصدر: 2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA) VLSI Systems, Architecture, Technology and Applications (VLSI SATA), 2024 IEEE 4th International Conference on. :1-5 May, 2024
Relation: 2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9798350362268
DOI:10.1109/VLSISATA61709.2024.10560076