التفاصيل البيبلوغرافية
| العنوان: |
Employing Parallelization Technique to Reduce Area and Power in a Booth Encoded Algorithm-Based Multiplier |
| المؤلفون: |
Javanmardi, Karwan, Sofimowloodi, Sobhan, Attar, Amir, Amini, Abdollah |
| المصدر: |
2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES) Mixed Design of Integrated Circuits and System (MIXDES), 2024 31st International Conference on. :92-97 Jun, 2024 |
| Relation: |
2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
