Hardware Acceleration Method Using RISC-V Core with No ISA Extensions

التفاصيل البيبلوغرافية
العنوان: Hardware Acceleration Method Using RISC-V Core with No ISA Extensions
المؤلفون: Wygrzvwalski, Mateusz, Skrzypiec, Pawel, Szczygiel, Robert
المصدر: 2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES) Mixed Design of Integrated Circuits and System (MIXDES), 2024 31st International Conference on. :265-269 Jun, 2024
Relation: 2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9788363578268
DOI:10.23919/MIXDES62605.2024.10614026