مؤتمر
A high-performance SRAM technology with reduced chip-level routing congestion for SoC
| العنوان: | A high-performance SRAM technology with reduced chip-level routing congestion for SoC |
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| المؤلفون: | Castagnetti, R., Venkatraman, R., Bartz, B., Monzel, C., Briscoe, T., Teene, A., Ramesh, S. |
| المصدر: | Sixth international symposium on quality electronic design (isqed'05) Quality Electronic Design Quality of Electronic Design, 2005. ISQED 2005. Sixth International Symposium on. :193-196 2005 |
| Relation: | Proceedings. 6th International Symposium on Quality Electronic Design |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 0769523013 9780769523019 |
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| تدمد: | 19483287 19483295 |
| DOI: | 10.1109/ISQED.2005.6 |