مؤتمر
A linear model for high-level delay estimation in VDSM on-chip interconnects
العنوان: | A linear model for high-level delay estimation in VDSM on-chip interconnects |
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المؤلفون: | Murgan, T., Ortiz, A.G., Petrov, M., Glesner, M. |
المصدر: | 2005 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and systems Circuits and Systems (ISCAS), 2005 IEEE International Symposium on. :1078-1081 Vol. 2 2005 |
Relation: | 2005 IEEE International Symposium on Circuits and Systems (ISCAS) |
قاعدة البيانات: | IEEE Xplore Digital Library |
ردمك: | 0780388348 9780780388345 |
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تدمد: | 02714302 21581525 |
DOI: | 10.1109/ISCAS.2005.1464779 |