Implementing caches in a 3D technology for high performance processors

التفاصيل البيبلوغرافية
العنوان: Implementing caches in a 3D technology for high performance processors
المؤلفون: Puttaswamy, K., Loh, G.H.
المصدر: 2005 International Conference on Computer Design Computer Design Computer Design: VLSI in Computers and Processors, 2005. ICCD 2005. Proceedings. 2005 IEEE International Conference on. :525-532 2005
Relation: Proceedings. 2005 International Conference on Computer Design
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:0769524516
9780769524511
تدمد:10636404
DOI:10.1109/ICCD.2005.65