مؤتمر
A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique
| العنوان: | A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique |
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| المؤلفون: | Jun-Hong Weng, Meng-Ting Tsai, Jung-Mao Lin, Ching-Yuan Yang |
| المصدر: | 2006 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems Circuits and Systems (ISCAS), 2006 IEEE International Symposium on. :4 pp.-3076 2006 |
| Relation: | 2006 IEEE International Symposium on Circuits and Systems (ISCAS) |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 0780393899 9780780393899 |
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| تدمد: | 02714302 21581525 |
| DOI: | 10.1109/ISCAS.2006.1693274 |