مؤتمر
A 256mW full-HD H.264 high-profile CODEC featuring dual macroblock-pipeline architecture in 65nm CMOS
| العنوان: | A 256mW full-HD H.264 high-profile CODEC featuring dual macroblock-pipeline architecture in 65nm CMOS |
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| المؤلفون: | Kenichi Iwata, Seiji Mochizuki, Tetsuya Shibayama, Fumitaka Izuhara, Hiroshi Ueda, Koji Hosogi, Hiroaki Nakata, Masakazu Ehama, Toru Kengaku, Takuichiro Nakazawa, Hiromi Watanabe |
| المصدر: | 2008 IEEE Symposium on VLSI Circuits VLSI Circuits, 2008 IEEE Symposium on. :102-103 Jun, 2008 |
| Relation: | 2008 IEEE Symposium on VLSI Circuits |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 9781424418046 9781424418053 |
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| تدمد: | 21585601 21585636 |
| DOI: | 10.1109/VLSIC.2008.4585968 |