Enabling 3D-IC foundry technologies for 28 nm node and beyond: through-silicon-via integration with high throughput die-to-wafer stacking

التفاصيل البيبلوغرافية
العنوان:	Enabling 3D-IC foundry technologies for 28 nm node and beyond: through-silicon-via integration with high throughput die-to-wafer stacking
المؤلفون:	Chen, D.Y., Chiou, W.C., Chen, M.F., Wang, T.D., Ching, K.M., Tu, H.J., Wu, W.J., Yu, C.L., Yang, K.F., Chang, H.B., Tseng, M.H., Hsiao, C.W., Lu, Y.J., Hu, H.P., Lin, Y.C., Hsu, C.S., Shue, Winston S., Yu, C.H.
المصدر:	2009 IEEE International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2009 IEEE International. :1-4 Dec, 2009
Relation:	2009 IEEE International Electron Devices Meeting (IEDM)
قاعدة البيانات:	IEEE Xplore Digital Library