مؤتمر
A 45nm SOI compiled embedded DRAM with random cycle times down to 1.3ns
| العنوان: | A 45nm SOI compiled embedded DRAM with random cycle times down to 1.3ns |
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| المؤلفون: | Jacunski, Mark, Anand, Darren, Busch, Robert, Fifield, John, Lanahan, Matthew, Lane, Paul, Paparelli, Adrian, Pomichter, Gary, Pontius, Dale, Roberge, Michael, Sliva, Stephen |
| المصدر: | IEEE Custom Integrated Circuits Conference 2010 Custom Integrated Circuits Conference (CICC), 2010 IEEE. :1-4 Sep, 2010 |
| Relation: | 2010 IEEE Custom Integrated Circuits Conference -CICC 2010 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 9781424457588 9781424457595 9781424457601 |
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| تدمد: | 08865930 21523630 |
| DOI: | 10.1109/CICC.2010.5617634 |