دورية أكاديمية
A Discrete-Time Model for the Design of Type-II PLLs With Passive Sampled Loop Filters
| العنوان: | A Discrete-Time Model for the Design of Type-II PLLs With Passive Sampled Loop Filters |
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| المؤلفون: | Wang, K. J., Galton, I. |
| المصدر: | IEEE Transactions on Circuits and Systems I: Regular Papers IEEE Trans. Circuits Syst. I Circuits and Systems I: Regular Papers, IEEE Transactions on. 58(2):264-275 Feb, 2011 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 15498328 15580806 |
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| DOI: | 10.1109/TCSI.2010.2072130 |