Assembly process and reliability assessment of TSV/RDL/IPD interposer with multi-chip-stacking for 3D IC integration SiP

التفاصيل البيبلوغرافية
العنوان: Assembly process and reliability assessment of TSV/RDL/IPD interposer with multi-chip-stacking for 3D IC integration SiP
المؤلفون: Zhan, Chau-Jie, Tzeng, Pei-Jer, Lau, John H., Dai, Ming-Ji, Chien, Heng-Chieh, Lee, Ching-Kuan, Wu, Shang-Tsai, Kao, Kuo-Shu, Huang, Shin-Yi, Fan, Chia-Wen, Chung, Su-Ching, Huang, Yu-Wei, Lin, Yu-Min, Chang, Jing-Yao, Yang, Tsung-Fu, Chen, Tai-Hung, Lo, Robert, Kao, M. J.
المصدر: 2012 IEEE 62nd Electronic Components and Technology Conference Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd. :548-554 May, 2012
Relation: 2012 IEEE 62nd Electronic Components and Technology Conference (ECTC)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9781467319645
9781467319669
9781467319652
تدمد:05695503
23775726
DOI:10.1109/ECTC.2012.6248883