مؤتمر
A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement
| العنوان: | A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement |
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| المؤلفون: | Nakata, Yohei, Kimi, Yuta, Okumura, Shunsuke, Jung, Jinwook, Sawada, Takuya, Toshikawa, Taku, Nagata, Makoto, Nakano, Hirofumi, Yabuuchi, Makoto, Fujiwara, Hidehiro, Nii, Koji, Kawai, Hiroyuki, Kawaguchi, Hiroshi, Yoshimoto, Masahiko |
| المصدر: | Fifteenth International Symposium on Quality Electronic Design Quality Electronic Design (ISQED), 2014 15th International Symposium on. :16-23 Mar, 2014 |
| Relation: | 2014 15th International Symposium on Quality Electronic Design (ISQED) |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 9781479939459 9781479939466 |
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| تدمد: | 19483287 19483295 |
| DOI: | 10.1109/ISQED.2014.6783301 |