دورية أكاديمية
Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS
| العنوان: | Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS |
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| المؤلفون: | Mammei, E., Loi, F., Radice, F., Dati, A., Bruccoleri, M., Bassi, M., Mazzanti, A. |
| المصدر: | IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 49(12):3130-3140 Dec, 2014 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 00189200 1558173X |
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| DOI: | 10.1109/JSSC.2014.2345770 |