ARC for sub-0.18 /spl mu/m logic and gigabit DRAM frontend and backend processes

التفاصيل البيبلوغرافية
العنوان: ARC for sub-0.18 /spl mu/m logic and gigabit DRAM frontend and backend processes
المؤلفون: Lee, W.W., Qizhi He, Chatterjee, A., Guoqiang Xing, Brennan, B., Singh, A., Zielinski, E., Hanratty, M., Sunny Fang, Rogers, D., Dixit, G., Carter, D., Luttmer, J.D., Havermann, B., Chapman, R.A.
المصدر: 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216) VLSI technology VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on. :86-87 1998
Relation: 1998 Symposium on VLSI Technology Digest of Technical Papers
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:0780347706
9780780347700
DOI:10.1109/VLSIT.1998.689210