دورية أكاديمية
High-Throughput LDPC-Decoder Architecture Using Efficient Comparison Techniques & Dynamic Multi-Frame Processing Schedule
| العنوان: | High-Throughput LDPC-Decoder Architecture Using Efficient Comparison Techniques & Dynamic Multi-Frame Processing Schedule |
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| المؤلفون: | Kumawat, S., Shrestha, R., Daga, N., Paily, R. |
| المصدر: | IEEE Transactions on Circuits and Systems I: Regular Papers IEEE Trans. Circuits Syst. I Circuits and Systems I: Regular Papers, IEEE Transactions on. 62(5):1421-1430 May, 2015 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 15498328 15580806 |
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| DOI: | 10.1109/TCSI.2015.2403032 |