مؤتمر
18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface
| العنوان: | 18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface |
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| المؤلفون: | Lee, Jong Chern, Kim, Jihwan, Kim, Kyung Whan, Ku, Young Jun, Kim, Dae Suk, Jeong, Chunseok, Yun, Tae Sik, Kim, Hongjung, Cho, Ho Sung, Kim, Yeon Ok, Kim, Jae Hwan, Kim, Jin Ho, Oh, Sangmuk, Lee, Hyun Sung, Kwon, Ki Hun, Lee, Dong Beom, Choi, Young Jae, Lee, Jeajin, Kim, Hyeon Gon, Chun, Jun Hyun, Oh, Jonghoon, Lee, Seok Hee |
| المصدر: | 2016 IEEE International Solid-State Circuits Conference (ISSCC) Solid-State Circuits Conference (ISSCC), 2016 IEEE International. :318-319 Jan, 2016 |
| Relation: | 2016 IEEE International Solid-State Circuits Conference (ISSCC) |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 9781467394666 9781467394673 |
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| تدمد: | 23768606 |
| DOI: | 10.1109/ISSCC.2016.7418035 |