مؤتمر
At-speed capture global noise reduction & low-power memory test architecture
| العنوان: | At-speed capture global noise reduction & low-power memory test architecture |
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| المؤلفون: | Bhaskaran, Bonita, Chadalavada, Sailendra, Sarangi, Shantanu, Valentine, Nithin, Nerallapally, Venkat Abilash Reddy, Abdollahian, Ayub |
| المصدر: | 2017 IEEE 35th VLSI Test Symposium (VTS) VLSI Test Symposium (VTS), 2017 IEEE 35th. :1-6 Apr, 2017 |
| Relation: | 2017 IEEE 35th VLSI Test Symposium (VTS) |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 9781509044825 9781509044818 |
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| تدمد: | 23751053 |
| DOI: | 10.1109/VTS.2017.7928936 |