دورية أكاديمية
A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation
| العنوان: | A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation |
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| المؤلفون: | Rangel-Patino, F.E., Viveros-Wacher, A., Rayas-Sanchez, J.E., Duron-Rosales, I., Vega-Ochoa, E.A., Hakim, N., Lopez-Miralrio, E. |
| المصدر: | IEEE Transactions on Emerging Topics in Computing IEEE Trans. Emerg. Topics Comput. Emerging Topics in Computing, IEEE Transactions on. 8(2):453-463 Jun, 2020 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 21686750 23764562 |
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| DOI: | 10.1109/TETC.2017.2757937 |