مؤتمر
Performance analysis of 16 × 16, 32 × 32, 64 × 64 2-D mesh topologies for network on chip
| العنوان: | Performance analysis of 16 × 16, 32 × 32, 64 × 64 2-D mesh topologies for network on chip |
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| المؤلفون: | Panem, Charanarur, Rane, Udaysingh V., Gad, Vinaya R., Kovendan, A. K. P., Sridharan, D., Gad, Rajendra S., Naik, Gourish M. |
| المصدر: | 2017 International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET) Wireless Communications, Signal Processing and Networking (WiSPNET), 2017 International Conference on. :1757-1764 Mar, 2017 |
| Relation: | 2017 International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET) |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 9781509044429 9781509044399 |
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| DOI: | 10.1109/WiSPNET.2017.8300063 |