Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus

التفاصيل البيبلوغرافية
العنوان: Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus
المؤلفون: Ohkawa, Takeshi, Ootsu, Kanemitsu, Yokota, Takashi, Kikuchi, Katsuya, Aoyagi, Masahiro
المصدر: 2017 IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) MCSOC Embedded Multicore/Many-core Systems-on-Chip (MCSoC), 2017 IEEE 11th International Symposium on. :128-135 Sep, 2017
Relation: 2017 IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9781538634417
DOI:10.1109/MCSoC.2017.27