A −40-dBc Integrated-Phase-Noise 45-GHz Sub-Sampling PLL with 3.9-dBm Output and 2.1% DC-to-RF Efficiency

التفاصيل البيبلوغرافية
العنوان:	A −40-dBc Integrated-Phase-Noise 45-GHz Sub-Sampling PLL with 3.9-dBm Output and 2.1% DC-to-RF Efficiency
المؤلفون:	Lee, Sangyeop, Takano, Kyoya, Hara, Shinsuke, Dong, Ruibing, Amakawa, Shuhei, Yoshida, Takeshi, Fujishima, Minoru
المصدر:	2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Radio Frequency Integrated Circuits Symposium (RFIC), 2019 IEEE. :175-178 Jun, 2019
Relation:	2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
قاعدة البيانات:	IEEE Xplore Digital Library