A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC

التفاصيل البيبلوغرافية
العنوان: A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC
المؤلفون: Mohapatra, Satyajit, Gupta, Hari Shanker, Mohapatra, Nihar Ranjan, Mehta, Sanjeev, Chowdhury, Arup Roy, Pandya, Nisha
المصدر: 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) VLSID VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID), 2019 32nd International Conference on. :305-310 Jan, 2019
Relation: 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9781728104096
تدمد:23806923
DOI:10.1109/VLSID.2019.00071