مؤتمر
Exploration and Exploitation of Dual Timing Margins for Improving Power Efficiency of Variable-Latency Designs
| العنوان: | Exploration and Exploitation of Dual Timing Margins for Improving Power Efficiency of Variable-Latency Designs |
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| المؤلفون: | Huang, Ning-Chi, Chen, Yu-Guang, Wu, Kai-Chiang |
| المصدر: | 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) VLSI (ISVLSI), 2019 IEEE Computer Society Annual Symposium on. :218-223 Jul, 2019 |
| Relation: | 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | ردمك: | 9781728133911 |
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| تدمد: | 21593477 |
| DOI: | 10.1109/ISVLSI.2019.00048 |