التفاصيل البيبلوغرافية
| العنوان: |
Verilog-A SPICE Model of PECVD SiO2 OTP Memory Device |
| المؤلفون: |
Kumar, Ashwani, Sadana, Sunny, Sharma, Akash, Pratiksha, Singh, Avinash, Chawla, Anuj, Sehgal, Deep, Jatana, H. S., Ganguly, Udayan, Chatterjee, Shouri, Suri, Manan |
| المصدر: |
2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India) Modeling of Systems Circuits and Devices (MOS-AK India), 2019 IEEE Conference on. :59-63 Feb, 2019 |
| Relation: |
2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
