التفاصيل البيبلوغرافية
العنوان: |
Via Size Optimization for Optimum Circuit Performance at 3 nm node |
المؤلفون: |
Mittal, Sushant, Pal, Ashish, Saremi, Mehdi, Bazizi, El Mehdi, Alexander, Blessy, Ayyagari, Buvna |
المصدر: |
2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Simulation of Semiconductor Processes and Devices (SISPAD), 2020 International Conference o. :327-330 Sep, 2020 |
Relation: |
2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) |
قاعدة البيانات: |
IEEE Xplore Digital Library |