مؤتمر
Parametric yield enhancement system via circuit level device optimization using statistical circuit simulation
العنوان: | Parametric yield enhancement system via circuit level device optimization using statistical circuit simulation |
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المؤلفون: | Miyama, M., Kamohara, S., Okuyama, K., Oji, Y. |
المصدر: | 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) VLSI circuits VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on. :163-166 2001 |
Relation: | 2001 Symposium on VLSI Circuits. Digest of Technical Papers |
قاعدة البيانات: | IEEE Xplore Digital Library |
ردمك: | 4891140143 9784891140144 |
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DOI: | 10.1109/VLSIC.2001.934227 |