Parametric yield enhancement system via circuit level device optimization using statistical circuit simulation

التفاصيل البيبلوغرافية
العنوان: Parametric yield enhancement system via circuit level device optimization using statistical circuit simulation
المؤلفون: Miyama, M., Kamohara, S., Okuyama, K., Oji, Y.
المصدر: 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) VLSI circuits VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on. :163-166 2001
Relation: 2001 Symposium on VLSI Circuits. Digest of Technical Papers
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:4891140143
9784891140144
DOI:10.1109/VLSIC.2001.934227