Dimple-array interconnect technique for packaging power semiconductor devices and modules

التفاصيل البيبلوغرافية
العنوان: Dimple-array interconnect technique for packaging power semiconductor devices and modules
المؤلفون: Wen, S.S., Huff, D., Guo-Quan Lu
المصدر: Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) Power semiconductor devices and ICs Power Semiconductor Devices and ICs, 2001. ISPSD '01. Proceedings of the 13th International Symposium on. :69-74 2001
Relation: Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:4886860567
9784886860569
تدمد:10636854
DOI:10.1109/ISPSD.2001.934561