التفاصيل البيبلوغرافية
| العنوان: |
Enabling Logic with Backside Connectivity via n-TSVs and its Potential as a Scaling Booster |
| المؤلفون: |
Veloso, A., Jourdain, A., Hiblot, G., Schleicher, F., D'have, K., Sebaai, F., Radisic, D., Loo, R., Hopf, T., De Keersgieter, A., Arimura, H., Eneman, G., Favia, P., Geypen, J., Arutchelvan, G., Chasin, A., Jang, D., Nyns, L., Rosseel, E., Hikavyy, A., Mannaert, G., Chan, B. T., Devriendt, K., Demuynck, S., Plas, G. Van der, Ryckaert, J., Beyer, G., Litta, E. Dentoni, Beyne, E., Horiguchi, N. |
| المصدر: |
2021 Symposium on VLSI Technology VLSI Technology, 2021 Symposium on. :1-2 Jun, 2021 |
| Relation: |
2021 Symposium on VLSI Technology |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
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