A High-linearity Phase Interpolator for 12.5Gbps Clock and Data Recovery Circuit of JESD204B Standard

التفاصيل البيبلوغرافية
العنوان: A High-linearity Phase Interpolator for 12.5Gbps Clock and Data Recovery Circuit of JESD204B Standard
المؤلفون: Liu, Bo, Chu, Fei, Wang, Zongmin, Zhang, Tieliang, Zhang, Lei, Yang, Song, Yang, Long, Peng, Mangxin
المصدر: 2021 IEEE 6th International Conference on Signal and Image Processing (ICSIP) Signal and Image Processing (ICSIP), 2021 IEEE 6th International Conference on. :1233-1242 Oct, 2021
Relation: 2021 IEEE 6th International Conference on Signal and Image Processing (ICSIP)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9781665439046
9781665439039
DOI:10.1109/ICSIP52628.2021.9688669