التفاصيل البيبلوغرافية
| العنوان: |
Design Implementation of a Low-Power 16T 1-bit Hybrid Full Adder |
| المؤلفون: |
Kanojia, Ayush, Agrawal, Sachin, Lorenzo, Rohit |
| المصدر: |
2021 International Conference on Control, Automation, Power and Signal Processing (CAPS) Control, Automation, Power and Signal Processing (CAPS), 2021 International Conference on Control, Automation, Power and Signal Processing (CAPS). :1-5 Dec, 2021 |
| Relation: |
2021 International Conference on Control, Automation, Power and Signal Processing (CAPS) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
