دورية أكاديمية
A Novel Clock Tree Aware Placement Methodology for Single Flux Quantum Logic Circuits With Maximum Path Length Consideration
| العنوان: | A Novel Clock Tree Aware Placement Methodology for Single Flux Quantum Logic Circuits With Maximum Path Length Consideration |
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| المؤلفون: | Wang, C., Mak, W. |
| المصدر: | IEEE Transactions on Applied Superconductivity IEEE Trans. Appl. Supercond. Applied Superconductivity, IEEE Transactions on. 32(5):1-12 Aug, 2022 |
| قاعدة البيانات: | IEEE Xplore Digital Library |
Full Text Finder | تدمد: | 10518223 15582515 23787074 |
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| DOI: | 10.1109/TASC.2022.3162637 |