An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Training Mechanism for DCNN Applications

التفاصيل البيبلوغرافية
العنوان: An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Training Mechanism for DCNN Applications
المؤلفون: Liu, Chi, Li, Shao- Tzu, Pan, Tong-Lin, Ni, Cheng-En, Sung, Yun, Hu, Chia-Lin, Chang, Kang-Yu, Hou, Tuo-Hung, Chang, Tian-Sheuan, Jou, Shyh-Jye
المصدر: 2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) VLSI Design, Automation and Test (VLSI-DAT), 2022 International Symposium on. :1-4 Apr, 2022
Relation: 2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:9781665409216
تدمد:24729124
DOI:10.1109/VLSI-DAT54769.2022.9768058