التفاصيل البيبلوغرافية
| العنوان: |
A System-Level Post-Silicon Validation Methodology for High-Speed Serial Interfaces |
| المؤلفون: |
Puligundla, Sudeep, T, Manikandan, Sunderland, Paul, V L, Vineeth, Daffron, Christopher, Nathal, Moises Puga, Gupta, Anshu, Tudoran, Felix, Linn, Timothy, Huang, Wayne, Luhadia, Sukay, Gardiner, Scott, V, Saikiran |
| المصدر: |
2022 IEEE International Test Conference India (ITC India) Test Conference India (ITC India), 2022 IEEE International. :1-5 Jul, 2022 |
| Relation: |
2022 IEEE International Test Conference India (ITC India) |
| قاعدة البيانات: |
IEEE Xplore Digital Library |
