A 5Gb/s 0.25/spl mu/m CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit

التفاصيل البيبلوغرافية
العنوان: A 5Gb/s 0.25/spl mu/m CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit
المؤلفون: Sang-Hyun Lee, Moon-Sang Hwang, Youngdon Choi, Sungioon Kim, Yongsam Moon, Bong-Joon Lee, Deog-Kyoon Jeong, Wonchan Kim, Young June Park, Gi-Jung Ahn
المصدر: 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Solid-state circuits conference Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International. 2:206-474 2002
Relation: 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
قاعدة البيانات: IEEE Xplore Digital Library
الوصف
ردمك:0780373359
9780780373358
DOI:10.1109/ISSCC.2002.992216