دورية أكاديمية
High Reliability Soft Error Hardened Latch Design for Nanoscale CMOS Technology using PVT Variation
| العنوان: | High Reliability Soft Error Hardened Latch Design for Nanoscale CMOS Technology using PVT Variation |
|---|---|
| المؤلفون: | Dhanushya, T.Aff1, IDs11277022100334_cor1, Latha, T. |
| المصدر: | Wireless Personal Communications: An International Journal. 128(2):1471-1487 |
| قاعدة البيانات: | Springer Nature Journals |
Find this article in full text from Springer Verlag. 
Full Text Finder | تدمد: | 09296212 1572834X |
|---|---|
| DOI: | 10.1007/s11277-022-10033-4 |